1. Field of the Invention
This invention relates to magnetic bubble domain devices. In particular, this invention relates to a magnetic bubble domain memory device wherein consecutive bit access is achieved without degradation of margin or other operating characteristics.
2. Description of Prior Art
Fast access bubble memory devices which incorporate switching of bubbles between storage tracks and an access track are usually operated with alternate bit access in which the writing and reading of bubbles occurs every second cycle of the field rotation. Generally, these devices are not operated with consecutive bit access due to the fact that switching and detection margins (bias, phase and amplitude) are degraded considerably as compared to alternate bit access. An example of this situation is the dollar sign switch which is usually used in the major-minor loop organization. With the minor loops located two periods apart relative to the major loop, consecutive bit access can be achieved by switching two bits from each minor loop to the major loop. The switching is performed during two consecutive field cycles by applying two current pulses with the appropriate phase and amplitude to the control conductor of the dollar sign switch. The second pulse, however, interferes with the bubble transferred out by the first pulse and causes this bubble to collapse at the upper bias range of the device operating margin. Phase and amplitude margins of the transfer pulses also become severely limited for successful operation with the consecutive bit access.
Another aspect of device function degradation in consecutive bit access, namely detection, is due to the fact that the stretching of the bubble strip in the detector is hindered at the higher bias range of the operating device margin due to mutual repulsion between adjacent bubble strips. The incomplete or unsuccessful stretching of bubble strips causes a loss of signal and, hence, faulty reading of the data. In addition, the signals of consecutive bits tend to interfere with one another causing a lower output than for alternate bits.